The present invention relates to a data processing technique, and more specifically to a technique particularly useful for transferring data between devices in a microcomputer system, e.g. a technique which is applied in a DMA controller for controlling the data transfer effected according to a DMA (direct memory access) system.
Along with a microprocessor, there is an LSI called a DMA controller as an LSI (large scale integrated circuit) comprising a microcomputer system. Instead of the microprocessor, this DMA controller serves as an LSI for controlling data transfer when the transfer of massive amounts of data is needed between data input/output units such as a high speed CRT terminal, a hard disc or a floppy disc and memory or between memories. As compared with data transfer effected by a software-aided microprocessor, the DMA controller has advantages that not only the speed of data transfer is increased but the data throughput throughout the whole system is improved as well due to concurrent processing.
As a DMA controller as mentioned above, there is also proposed a high grade DMA controller which can not only transfer data comprising a maximum word length of 32 bits in accordance with several modes but which also incorporates a variety of exceptional processing functions such as recovering bus errors and interrupts as well as an error detecting function. (See, for example, "Nikkei Electronics", Aug. 2, 1982, No. 296, 129 to 158, Nikkei McGRAW Hill Inc.).
However, in a data transfer operation by a conventional DM controller, source addresses and destination addresses are each updated separately, one after another in succession, which therefore makes it impossible to store each item of data alternately since a series of groups of data are stored in succession within a given address space.